Resist layers (sometimes called photoresist layers to imply the lithographic processes typically used with them) are frequently used to generate masks during the fabrication of integrated circuits. Typically, a layer of resist material 304 is deposited on the surface of an underlying layer 302 to be patterned, and then the resist layer 304 is exposed to light 300 that is passed through an exposure pattern 301 (see FIG. 3a). The resist material 304 is processed in such a way that the exposed portions of the resist material 304 (or alternately the non-exposed portions) are removed, so that the remaining resist material 304 forms a mask in the shape of the exposure pattern (See FIG. 3b). The patterned resist material 304 includes sidewalls 306 that serve to define circuit features in the underlying layer 302. The sidewalls 306 include a pre-etch sidewall angle 308, that is typically about 90 degrees.
The areas of underlying layer 302 that are not directly covered by the resist material 304 are removed through an etch process, such as a plasma etch, with the mask of resist material 304 preventing removal of those portions of the underlying material that are directly under the resist material 304 (FIG. 3c). Because an etch is a destructive process, the etch may cause deterioration of the resist material 304. This deterioration may uncover additional portions of the underlying material 302 before the etch is complete, thereby etching portions of the underlying material 302 that were intended to be protected from the etch process.
The deterioration is typically greatest at the sidewalls 306 of the resist material 304, i.e., a post-etch sidewall angle 308′ of the sidewalls 306 is less than the pre-etch sidewall angle 308 of the sidewall 306, which results in a sloped resist sidewall 306. Circuit features, such as trenches, that may be etched in a substrate, for example, a low k dielectric material, may exhibit significant sloping because the sidewalls 306 of the resist material 304 that define those features are unintentionally etched away (FIG. 3c). If not treated carefully, excessive resist sloping during plasma etching can cause shorting (because the sloped angle of the resist mask is transferred to the circuit feature) between features such as between metal lines or between trenches, for example, which can leading to device failure.
In addition, resist material that is designed for exposure to light with a wavelength of approximately 193 nanometers (which is commonly used for sub 0.13 micron circuit features) is particularly susceptible to deterioration during the plasma etch. To improve etch resistance, one common approach is to increase the carbon-to-hydrogen ratio in the resist material while maintaining its transparency to exposure light. Several available options have been utilized, such as multi-ringed aliphatic groups, poly methyl methacrylate, or cyclo olefin-maleic anhydride copolymer platforms. However, these approaches have limited success in achieving etch resistance comparable with 248 nm resist, which is commonly used for circuit features greater than about 0.13 microns.
Therefore, there is a need for improved methods of plasma etching that reduce the deterioration of deep ultraviolet (uv) resist material, such as 193 nm resist material, so that underlying features do not exhibit sloping which can lead to device failure. The present invention provides such methods and their associated structures.